Global User Control Register 2
| DISABLECFC | Disable xHCI Errata feature contiguous frame ID capability. This field controls the xHCI Errata feature Contiguous FrameID capability. When set, the HCCPARAMS1[CFC] bit will be set to 0x0 indicating that CFC is not supported. Disable this feature only if the application cannot tolerate Misssed Service Error events for ISOC transfers, and the system latencies are large to cause Missed Service errors even if the software is following the Isochronous Thresholding rules. |
| ENABLEEPCACHEEVICT | Enable evicting endpoint cache after flow control for bulk endpoints. A performance enhancement was done to keep the non-stream capable bulk IN endpoint in cache after flow control. Setting this bit will disable this enhancement. This should be set only for debug purpose. |
| RST_ACTBITLATER | Enable clearing of the command active bit for the ENDXFER command after the command execution is completed. This bit is valid in Device mode only. |
| EN_HP_PM_TIMER | This register field is used to set new HP and PM timers. To enable PM timer, set the GUCTL2[19] bit as 0x1. To enable HP timer, set the GUCTL2[20] bit as 0x1. Default value of HP timer is 4 us when HP PM timer is not enabled; when new HP timer is enabled default value is 12 us. |